Semiconductor packaging materials

By Jan Vardaman, TechSearch International, and Dan Tracy, SEMI

The electronics industry trend towards smaller and thinner form factors has ushered an era of significant changes in packaging materials. As these trends continue, innovative material solutions will be needed to address demanding requirements related to product integration, mobility, and reliability. Mobile electronics — especially smartphones and tablet computers — are the major unit volume drivers for semiconductor device sales and have unique packaging requirements. Given the compact form-factors and demands for connectivity, advanced packaging technologies such as wafer-level packaging (WLP), flip chip packaging for wireless, and package-on-package (PoP) deliver the necessary device integration needed in a thinner and smaller form factor package, and materials technologies are key in enabling this trend.

Flip Chip Package Growth Outlook

According to the upcoming SEMI Global Semiconductor Packaging Materials Outlook—2013-2014 Edition, the outlook for advanced packaging remains strong. These packages include ball grid array (BGA), CSP (including leadframe-based QFNs), flip chip, WLP, and various 3-D packages such as stacked-die and PoP. TechSearch has shown that 15 percent of 190 billion packaged ICs shipped in 2012 were in advanced packaging form factors, and this will grow to an estimated 21 percent of the 244 billion units to be shipped in 2017. Flip chip packaged units will grow at a compound annual growth rate (CAGR) of 25 percent between 2012 and 2017 with wireless products driving the growth. Over the same timeframe, WLP, which has already experience strong growth in unit shipments, is forecasted to grow at an 11 percent CAGR due to the strength in the mobile sector.

Advancements in materials technology and new materials will be needed to solve challenges pertaining to device and system integration and to package and system reliability. New materials and processes will enable the semiconductor industry to advance scaling in packaging down to the 16nm node and below. Semiconductor manufacturers and packaging subcontractors have identified a number of concerns, unmet material needs, and opportunities for material suppliers. The table below summarizes some general issues and topics identified particular material segment.

Key Issues and Concerns of Users of Packaging Materials