Delamination in semiconductor plastic packages often happens in many interfaces within the package itself, which is mainly caused by coefficient of thermal expansion (C.T.E) mismatch between the interfaces of two materials within the package. Die attach delamination is the separation between the silicon die and die attach pad on leadframe. Die attach delamination will reduce the total area of silicon die attached to pad and it is known to have increase the thermal resistance of the package. This could lead to early thermal shutdown of a device which uses exposed pad to dissipate heat. This paper is to investigate the die attach coverage effect on the package thermal resistance. A thermal modeling was done on various % of epoxy coverage to evaluate package thermal resistance. TQFP 100L with and without exposed pad are used for this model. Results show that die contact area to the pad will significantly affect the package thermal performance, especially at high power application. Package with exposed pad design will have higher increase of θja than non exposed pad in the event of die attach delamination.
Central Semiconductor – CFTVS5V0BULC: TVS Protection for ...
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