WASHINGTON—April 1, 2014—The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing and design, today announced the release of the 2013 International Technology Roadmap for Semiconductors (ITRS), a collaborative effort that assesses the technical challenges and opportunities for the semiconductor industry through 2028. The ITRS seeks to identify future technical obstacles and shortfalls, so the industry and research community can collaborate effectively to overcome them and build the next generation of semiconductors – the foundation of modern electronics.
“For more than two decades, the Roadmap has played an important role in assessing and improving the future of semiconductor technology, ” said Brian Toohey, president and CEO, Semiconductor Industry Association. “The rapid pace of semiconductor innovation has spurred growth in virtually every sector of the global economy, and the ITRS has helped enable this forward march of innovation by keeping the industry focused on the opportunities and challenges that lie ahead. Using the ITRS as a guide, our industry’s brilliant researchers, engineers and scientists will continue to develop next-generation semiconductor technologies that lead to smaller, faster, more efficient and less costly end-use devices. These technology advances will have profound impacts on people across the globe as they are applied to health care, communications, transportation, national defense, clean energy, entertainment, and a range of other applications.”
The ITRS is sponsored by five regions of the world – Europe, Japan, Korea, Taiwan, and the United States – and is led by the International Roadmap Committee. Through the cooperative efforts of the global chip manufacturers and equipment suppliers, research communities and consortia, the ITRS identifies critical gaps, technical needs, and potential solutions related to semiconductor technology. Some key findings and predictions of the 2013 ITRS include the following:
• The combination of 3D device architecture and low power devices will usher in a new era of scaling identified in short as “3D Power Scaling.” The increase in the number of transistors per unit area will eventually be accomplished by stacking multiple layers of transistors.
• Progress in manipulation of edgeless wrapped materials (e.g., carbon nanotubes, graphene combinations, etc.) offer the promise of ballistic conductors, which may emerge in the next decade.
• There will be two additional ways of providing novel opportunities for future semiconductor products. The first consists of extending the functionality of the CMOS platform via heterogeneous integration of new technologies, and the second consists of stimulating invention of devices that support new information-processing paradigms.
• The integration of multiple technologies in a limited space (e.g., GPS, phone, tablet, mobile phones, etc.) has revolutionized the semiconductor industry by shifting the main goal of any design from a performance driven approach to a reduced power driven approach.
• Looking at Long Term Devices and Systems (7-15 years horizon, beyond 2020) the 2013 ITRS reports on completely new devices operating on completely new principles and amenable to support completely new architectures. For instance, spin wave device (SWD) is a type of magnetic logic device exploiting collective spin oscillation (spin waves) for information transmission and processing. SWD converts input voltage signals into the spin waves, computes with spin waves, and converts the output spin waves into the voltage signals.