ILD Semiconductor

Low dielectric materials Integrated circuit dimensions will continue to shrink until a 0.03m minimum feature size is reached sometime in the second decade of the twenty-first century. At these dimensions, the use of existing interconnect materials may not be possible due to inherent property limitations. Thus there is substantial interest in materials that can replace Al or its alloys as an interconnection metal and SiO2-based insulators as interlayer dielectrics(ILDs) The need for new ILD materials arises from the high dielectric constant(k) of SiO2. Capacitance is directly proportional to k, so high k values lead to high capacitance(C), and thus to unacceptable RC delays. Lowering the total capacitance also decreases power dissipation. As previously mentioned, insulating materials used as interlayer dielectrics(ILDs) of a metal line are demanded to be lower than the currently used material since low-k dielectric materials are allowed to enhance the signal propagation. Low-k dielectrics not only lower line-to-line capacitance, but also reduce cross-talk noise in the interconnect and alleviate power dissipation issues. As the device is smaller, the improvement of the interconnection technique must be inevitable. Namely, the performance of a device in the next generation materials of interconnection is strongly dependent on the characteristic of a metal line and a dielectric materials. Especially, because the interlayer dielectrics(ILD) commercially used is CVD SiO2, those dielectric constants are about 4 that is relatively high in the present interconnection. In the semiconductor with feature size below 0.18m in Figure 1, the interconnect delay begins to dominate overall device delay at 0.18 m, making copper and low-k transitions so attractive. Increasing device capacitance is remedied by reducing dielectric constant (k) from about a 4.0 for SiO2 to 3.0, 2.0 and as close to 1.0 as possible. While the jump to copper was interpreted as a setback for low-k dielectrics, a recent progress in integrating various low-k materials is quite encouraging. Importantly, while the semiconductor roadmap in Table 1 calls for dielectrics with k = 2.5 - 3.0 for 0.18 m devices and 2.0-2.5 at 0.15 m, it appears the industry is being more conservative, implementing k = 3.0 - 4.0 at 0.18 m and 2.5 - 3.0 at the next technology node, 0.15 m or 0.13 m. In our laboratory, we design a molecular structure, synthesize novel polymers and examine for the low-k dielectric application.